To refine and measure the hardware and software performance of SDRs similar to BBRF103 there is an excellent software tool developed at the time by Linear Technology, today Analog Devices.

PScope allows you to quickly evaluate the performance of ADC chips.


I recommend the web page PScope: High-Speed ADC Data Collection Software on the Analog site where there is also a link to download installation file it is free.

The video is also on youtube

The application has a help file and Analog Devices presents a PScope-Basics  page.

When used with ADC development boards the program requires specific drivers but can be installed without any driver.
It is possible to input the data we want to measure through a file that has a specific format that I tried to emulate by replicating the header of the file.
The files have the extension .adc
Our program, in my case ExtIO.dll will call my PScopeShot function specifying the name of the file that will be created, a title, a short description, the sample rate, the data pointer, their length.

Let's start with an example.
I'm trying to figure out if the performance of my RF103 prototype (an HF-only version of BBRF103 with minor modifications) can be improved in hardware or software.

In the Extio.dll in the debugging configuration I have activated the possibility to replace the data generated by the ADC with a virtual buffer that contains the samples of a 16 bit sinusoid sampled and explored at the desired frequency.

In the initialization procedure of the dll I added the code:

#ifndef _NO_PScope_ACTIVE_
/* Virtual sine generator test PScope
unsigned int kidx = 0;
float samplerate = adcfixedfreq;
unsigned int mdf = Xfreq * ((double) 65386000.0/samplerate); // freq correction
short* testdata = (short *) malloc(RF_TABLE_SIZE * sizeof( short)); // test buffer data
unsigned int numsamples = global.transferSize/sizeof(short);
for (unsigned int n =0; n < numsamples; n++ )
kidx %= RF_TABLE_SIZE;
testdata[n] = sine_table_16bit[kidx] ;
kidx += mdf;
PScopeShot("VirtualSineWave.adc", "RF103_7a", "VirtualSineWave.adc input virtual test 16 bit sine", testdata, samplerate, numsamples );
free (testdata);
#endif // _PScope_ACTIVE_

 The PscopeShot procedure is defined as

int PScopeShot(const char * filename, const char * title2, const char * title1, short * data, float samplerate, unsigned int numsamples )
FILE *fp;
fp = fopen(filename, "w+");
fputs("Version,115\n", fp);
fprintf(fp, "Retainers,0,1,%d,1024,0,%f,1,1\n",numsamples,samplerate );
fputs("Placement,44,0,1,-1,-1,-1,-1,88,40,1116,879", fp);
fputs("WindMgr,7,2,0\n", fp);
fputs("Page,0,2\n", fp);
fputs("Col,3,1\n", fp);
fputs("Row,2,1\n", fp);
fputs("Row,3,146\n", fp);
fputs("Row,1,319\n", fp);
fputs("Col,2,1063\n", fp);
fputs("Row,4,1\n", fp);
fputs("Row,0,319\n", fp);
fputs("Page,1,2\n", fp);
fputs("Col,1,1\n", fp);
fputs("Row,1,1\n", fp);
fputs("Col,2,425\n", fp);
fputs("Row,4,1\n", fp);
fputs("Row,0,319\n", fp);
fprintf(fp,"DemoID,%s,%s,0\n", title1, title2 );
fprintf(fp,"RawData,1,%d,16,-32768,32767,%f,-3.276800e+04,3.276800e+04\n", numsamples,samplerate);
for (unsigned int n = 0; n < numsamples; n++ )
fprintf(fp, "%d\n", data[n]);
fputs("end\n", fp);
return fclose(fp);

 The acquired file of the virtual generator signal when loaded in PScope File menu draws:


 No bad for a 16bit software table lookup implementation!


Here the picture of the HDSDR output when we select the RF virtual tone generator. It’s very similar to PScope analysis and result. 

In a second test I forced the software DDC input samples to a constant value, a DC component.

short anyvalue = 0x5aC3;
for (unsigned int n =0; n < numsamples; n++ )
testdata[n] = anyvalue;
PScopeShot("VirtualDClevel.adc", "RF103_7a", "VirtualDClevel.adc input virtual test DC value", testdata, samplerate, numsamples );

 The PScope analysis shows no noise component as we have a perfect stable input virtual level.


SNR not available as there as noise is absent.

In the HDSDR world we get:


This only verifies that there are no noise components added by the DDC.



BBRF103  posts 

BreadBoard RF103          20 June, 2017

Some variations of ExtIO_sddc.dll architecture        31 August, 2017   

Troubleshooting BBR103          22 September, 2017

BBRF103 and ExtIO.dll ver. 0.96 get 32 MHz span    1 March, 2018

R820T2 update - BBRF103_2 PCB           10 April, 2018

BBRF103 - Band L reception                   26 May, 2018

Just another BBRF103 version                14 August, 2018

BBRF103-2 RC3 is here!                         1 September, 2018

BBRF103 Construction notes                   4 May, 2019

BBRF103 Some measurements               20 May, 2019

Receivers similar to BBRF103 ?               08 June, 2020

PScope a useful tool                              19 June, 2020